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Associate Professor Oliver Diessel

Associate Professor Oliver Diessel

Associate Professor
Engineering
Computer Science and Engineering

Dr Oliver Diessel is an Associate Professor in theÌýSchoolÌýof ComputerÌýScience and Engineering.

Research interests

Ìý

I develop methods for the design, test and implementation of digital systems in reconfigurable logic devices called Field-Programmable Gate Arrays.

My interest is in dynamically reconfigurable digital systems in which the circuits are modified while the system is operational.

I aim to promote the use of reconfigurable systems through the development of architectures, design methods and tools that enhance their benefits and reduce their costs.

Interest in engineering

Why did you get into engineering?

A fascination with technology and a natural tendency towards mathematics and science.

What are your research goals?

To develop smart devices that can act independently to benefit people.

What do people not understand about what you do?

They think I can help with practical issues such as fixing their PC or advising them on the best machine to buy. They would be better off asking me some theoretical questions.

Advice for prospective computer engineers & scientists

A career in computer engineering or computer science can see you changing the world. With this great power comes great responsibility. Keep an open mind to the wider implications of what you learn and do. And follow your dream.

Lectures/Courses taught

Configurable Systems

, ºÚÁÏÍø´óÊÂ¼Ç (2009 – present)

Computer Architecture

, ºÚÁÏÍø´óÊÂ¼Ç (2004 – 2006)

, ºÚÁÏÍø´óÊÂ¼Ç (2002 – 2006, 2012)

Digital Systems

, ºÚÁÏÍø´óÊÂ¼Ç (2008, 2010 – present)

FPGA Implementation of Digital Systems using Verilog, Harbin Institute of Technology (2014 - present)

COMP2021 – Digital Systems Structures, ºÚÁÏÍø´óÊÂ¼Ç (2000 – 2004)

FPGA Design Course, Ho Chi Minh City University of Technology (2003)

Computer Programming

, ºÚÁÏÍø´óÊÂ¼Ç (2008 – 2009)

XCMP1000 – Computing 1, ºÚÁÏÍø´óÊÂ¼Ç Asia (2007)

COMP1021 – Computing 1B, ºÚÁÏÍø´óÊÂ¼Ç (2005)

Professional Issues & Ethics

COMP4920 – Professional Issues and Ethics, ºÚÁÏÍø´óÊÂ¼Ç (2001)

Students

Number currently in lab: 2

Number graduated: 6

Student Projects:

Current students work on design of fault-tolerant FPGA-based systems for space and fine-grained accelerators for heterogeneous devices.

Previous students have worked on multi-core task migration, the verification of dynamically reconfigurable systems, communications infrastructure for module-based dynamically reconfigurable systems, and configuration encoding techniques for rapid reconfiguration.

Looking for students for projects related to:

Dynamic modular reconfiguration of FPGA-based TMR circuits. This project involves the development of techniques to meet reliability, performance and resource constraints for SRAM FPGA-based implementations of digital systems to recover from radiation-induced Single Event Upsets. We are investigating design approaches, CAD tools for circuit synthesis, partitioning and layout, and benchmarking with circuits typical of applications deployed in space.

Run-time validation of FPGA-based computations. Computational tasks hosted on FPGA devices are increasingly susceptible to run-time errors due to process variation, device degradation and radiation. This project seeks to develop efficient (better than TMR) techniques for checking the correctness of tasks while they are running. Another thrust is to validate dynamically acquired FPGA configurations.

Professional Organisations and Consulting positions

IEEE Member

Editorial Board, ACM Transactions on Reconfigurable Technology and Systems

Education

PhD/postgraduate

PhD, University of Newcastle, Australia, 1998

Undergraduate

B.E. (Computer, Hons), University of Newcastle, Australia, 1991

B.Math., University of Newcastle, Australia, 1991

Phone
+61 2 9385 7384
Location
School of Computer Science & Engineering (K17) Level 5, Room 501B Kensington Campus
  • Books | 2014
    Gong L; Diessel O, 2014, Functional Verification of Dynamically Reconfigurable FPGA-based Systems, Springer
    Books | 2000
    ElGindy H; Prasanna VK; Schmeck H; Diessel O, 2000, 7th Reconfigurable Architectures Workshop (RAW2000)
  • Book Chapters | 2016
    Cetin E; Diessel O; Li T; Ambrose J; Fisk T; Parameswaran S; Dempster A, 2016, 'Overview and Investigation of SEU Detection and Recovery Approaches for FPGA-Based Heterogeneous Systems', in FPGAs and Parallel Architectures for Aerospace Applications Soft Errors and Fault-Tolerant Design, Springer, pp. 33 - 46,
  • Journal articles | 2019
    Kroh A; Diessel O, 2019, 'Efficient fine-grained processor-logic interactions on the cache-coherent zynq platform', ACM Transactions on Reconfigurable Technology and Systems, 11,
    Journal articles | 2018
    Agiakatsikas D; Cetin E; Diessel O, 2018, 'FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs', IEEE Transactions on Aerospace and Electronic Systems, 54, pp. 2695 - 2712,
    Journal articles | 2018
    Nguyen NTH; Agiakatsikas D; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2018, 'Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery', Microprocessors and Microsystems, 60, pp. 86 - 95,
    Journal articles | 2018
    Zhao Z; Nguyen NTH; Agiakatsikas D; Lee G; Cetin E; Diessel O, 2018, 'Fine-grained module-based error recovery in FPGA-based TMR systems', ACM Transactions on Reconfigurable Technology and Systems, 11, pp. 1 - 23,
    Journal articles | 2017
    Lee G; Cetin E; Diessel O, 2017, 'Fault recovery time analysis for coarse-grained reconfigurable architectures', ACM Transactions on Embedded Computing Systems, 17, pp. 1 - 21,
    Journal articles | 2017
    Leong PHW; Amano H; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; Lysaght P; Platzner M; Prasanna VK; Rissa T; Silvano C; So HKH; Wang Y, 2017, 'The first 25 years of the FPL conference: Significant papers', ACM Transactions on Reconfigurable Technology and Systems, 10,
    Journal articles | 2017
    Wang C; Li X; Chen Y; Zhang Y; Diessel O; Zhou X, 2017, 'Service-Oriented Architecture on FPGA-Based MPSoC', IEEE Transactions on Parallel and Distributed Systems, 28, pp. 2993 - 3006,
    Journal articles | 2014
    Gong L; Diessel O, 2014, 'Simulation-based functional verification of dynamically reconfigurable systems', ACM Transactions on Embedded Computing Systems (TECS), 13, pp. 97 - 97
    Journal articles | 2012
    Shannon L; Diessel O; Bergmann NW, 2012, 'Guest editorial: Field-programmable technology', Journal of Signal Processing Systems, 67, pp. 1 - 2,
    Journal articles | 2010
    Koh S; Diessel OF, 2010, 'Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration', ACM Transactions on Reconfigurable Technology and Systems, 3, pp. 1 - 36,
    Journal articles | 2004
    Scheuermann B; So KK; Guntsch M; Middendorf M; Diessel OF; Elgindy H; Schmeck H, 2004, 'FPGA Implementation of Population-based Ant Colony Optimization', Applied soft computing : the official journal of the World Federation on Soft Computing (WFSC), 4, pp. 303 - 322
    Journal articles | 2002
    Diessel O; Malik U; So K, 2002, 'Towards high-level specification, synthesis, and virtualization of programmable logic designs', European Conference on Parallel Processing, pp. 314 - 317
    Journal articles | 2001
    Diessel OF; Elgindy H, 2001, 'On dynamic task scheduling for FPGA-based systems', International Journal of Foundations of Computer Science, 12, pp. 645 - 669
    Journal articles | 2001
    Diessel OF; Milne G, 2001, 'A hardware compiler realizing concurrent processes in reconfigurable logic', IEE Proceedings-Computers and Digital Techniques, 148, pp. 152 - 162
    Journal articles | 2000
    Diessel OF; Elgindy H; Middendorf M; Schmeck H; Schmidt B, 2000, 'Dynamic scheduling of tasks on partially reconfigurable FPGAs', IEE Proceedings-Computers and Digital Techniques, 147, pp. 181 - 188
    Journal articles | 1996
    Beresford-Smith B; Diessel O; ElGindy H, 1996, 'Optimal algorithms for constrained reconfigurable meshes', Journal of Parallel and Distributed Computing, 39, pp. 74 - 78
  • Conference Papers | 2022
    Fan J; Diessel O, 2022, 'On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs', in Proceedings 2022 IEEE 30th International Symposium on Field Programmable Custom Computing Machines Fccm 2022,
    Conference Papers | 2022
    Wu T; Diessel O, 2022, 'Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work', in Proceedings 2022 IEEE 30th International Symposium on Field Programmable Custom Computing Machines Fccm 2022,
    Conference Papers | 2019
    Kastensmidt FL; Diessel O, 2019, '2019 Reconfigurable Architectures Workshop', in Proceedings 2019 IEEE 33rd International Parallel and Distributed Processing Symposium Workshops Ipdpsw 2019, pp. 69,
    Conference Papers | 2019
    Tran Huu Nguyen N; Cetin E; Diessel O, 2019, 'Scheduling configuration memory error checks to improve the reliability of FPGA-based systems', in Iet Computers and Digital Techniques, pp. 198 - 205,
    Conference Papers | 2018
    Agiakatsikas D; Lee G; Mitchell T; Cetin E; Diessel O, 2018, 'From C to Fault-Tolerant FPGA-Based Systems', in Proceedings 26th IEEE International Symposium on Field Programmable Custom Computing Machines Fccm 2018, Institute of Electrical and Electronics Engineers (IEEE), CO, Boulder, pp. 212, presented at 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), CO, Boulder, 29 April 2018 - 01 May 2018,
    Conference Papers | 2018
    Kroh A; Diessel O, 2018, 'A Short-Transfer Model for Tightly-Coupled CPU-FPGA Platforms', in Proceedings 2018 International Conference on Field Programmable Technology Fpt 2018, pp. 369 - 372,
    Conference Papers | 2017
    Gong L; Kroh A; Agiakatsikas D; Nguyen NTH; Cetin E; Diessel O, 2017, 'Reliable SEU monitoring and recovery using a programmable configuration controller', in 2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, presented at 2017 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, Belgium, 04 September 2017 - 08 September 2017,
    Conference Papers | 2017
    Lee G; Agiakatsikas D; Wu T; Cetin E; Diessel O, 2017, 'TLegUp: A TMR code generation tool for SRAM-based FPGA applications using HLS', in Proceedings IEEE 25th Annual International Symposium on Field Programmable Custom Computing Machines Fccm 2017, Institute of Electrical and Electronics Engineers (IEEE), CA, Napa, pp. 129 - 132, presented at 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), CA, Napa, 30 April 2017 - 02 May 2017,
    Conference Papers | 2017
    Nguyen NTH; Cetin E; Diessel O; Nguyen T, 2017, 'Scheduling considerations for voter checking in TMR-MER systems', in Proceedings - IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2017, Institute of Electrical and Electronics Engineers (IEEE), Napa, CA, USA, pp. 30 - 30, presented at 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, USA, 30 April 2017 - 02 May 2017,
    Conference Papers | 2017
    Nguyen NTH; Cetin E; Diessel O, 2017, 'Scheduling Voter Checks to Detect Configuration Memory Errors in FPGA-based TMR Systems', in 2017 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), IEEE, ENGLAND, Cambridge, pp. 131 - 134, presented at IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), ENGLAND, Cambridge, 23 October 2017 - 25 October 2017,
    Conference Papers | 2017
    Nguyen NTH; Cetin E; Diessel O, 2017, 'Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systems', in 2017 IEEE Int Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Dft 2017, Institute of Electrical and Electronics Engineers (IEEE), pp. 1 - 4, presented at 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 23 October 2017 - 25 October 2017,
    Conference Papers | 2016
    Agiakatsikas D; Cetin E; Diessel O, 2016, 'FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs', in Field Programmable Logic and Applications (FPL), 2016 26th International Conference on, Institute of Electrical and Electronics Engineers (IEEE), EPFL, pp. 1 - 4, presented at 2016 26th International Conference on Field Programmable Logic and Applications (FPL), EPFL, 29 August 2016 - 02 September 2016,
    Conference Papers | 2016
    Agiakatsikas D; Nguyen NTH; Zhao Z; Wu T; Cetin E; Diessel O; Gong L, 2016, 'Reconfiguration Control Networks for TMR Systems with Module-based Recovery', in Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, Institute of Electrical and Electronics Engineers (IEEE), USA, pp. 88 - 91, presented at IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), USA, 01 May 2016 - 03 May 2016,
    Conference Papers | 2016
    Gong L; Wu T; Nguyen NTH; Agiakatsikas D; Zhao Z; Cetin E; Diessel OF, 2016, 'A Programmable Configuration Controller for Fault-Tolerant Applications', in Song YC; Wang S; Nelson B; Li J; Peng Y (eds.), The 2016 International Conference on Field-Programmable Technology (FPT'16), Institute of Electrical and Electronics Engineers (IEEE), Xi'an, China, pp. 117 - 124, presented at The 2016 International Conference on Field-Programmable Technology (FPT'16), Xi'an, China, 07 December 2016 - 09 December 2016,
    Conference Papers | 2016
    Nguyen NTH; Agiakatsikas D; Cetin E; Diessel O, 2016, 'Dynamic scheduling of voter checks in FPGA-based TMR systems', in Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, pp. 169 - 172, presented at 2016 International Conference on Field-Programmable Technology (FPT), Xi'an, China, 07 December 2016 - 09 December 2016,
    Conference Papers | 2016
    Nguyen NTH; Cetin E; Diessel OF, 2016, 'Dynamic Scheduling of Voter Checks in FPGA-based TMR Systems', in The 2016 International Conference on Field-Programmable Technology (FPT'16), Xi'an, China, pp. M2 - M2, presented at The 2016 International Conference on Field-Programmable Technology (FPT'16), Xi'an, China, 07 December 2016 - 09 December 2016
    Conference Papers | 2016
    Zhao Z; Agiakatsikas D; Nguyen NT; Cetin E; Diessel O, 2016, 'Fine-grained Module-based Error Recovery in FPGA-based TMR Systems', in Song YC; Wang S; Nelson B; Li J; Peng Y (eds.), International Conference on Field-Programmable Technology (FPT), Institute of Electrical and Electronics Engineers (IEEE), Xi'an, China, pp. 101 - 108, presented at International Conference on Field-Programmable Technology, Xi'an, China, 07 December 2016 - 09 December 2016,
    Conference Papers | 2015
    Cetin E; Diessel O; Gong L, 2015, 'Improving F max of FPGA circuits employing DPR to recover from configuration memory upsets', in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Institute of Electrical and Electronics Engineers (IEEE), IEEE, pp. 1190 - 1193, presented at 2015 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 24 May 2015 - 27 May 2015,
    Conference Presentations | 2015
    Diessel OF, 2015, 'Application, Design & Test of Dynamically Reconfigurable Field-Programmable Gate Array-based Systems', presented at IET/IEEE/EA Joint Institutions Lecture, Engineers Australia, 13 August 2015 - 13 August 2015
    Conference Presentations | 2015
    Diessel OF, 2015, 'Detecting and Mitigating Radiation-Induced Errors in SRAM-based Field-Programmable Gate Arrays', presented at 12th IEEE International Conference on Electronic Measurement & Instruments (ICEMI’2015), Qingdao, -
    Conference Papers | 2015
    Kroh A; Diessel O, 2015, 'Towards OS kernel acceleration in heterogeneous systems', in First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC15), IEEE, IEEE
    Conference Papers | 2015
    Leong PHW; Amano HC; Anderson J; Bertels K; Cardoso JMP; Diessel O; Gogniat G; Hutton M; Lee J; Luk W; others , 2015, 'Significant papers from the first 25 years of the FPL conference', in International Conference on Field Programmable Logic and Applications, IEEE, IEEE
    Conference Papers | 2015
    Tran VT; Shivaramaiah NC; Diessel O; Dempster AG, 2015, 'A programmable multi-gnss baseband receiver', in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, pp. 1178 - 1181, IEEE
    Conference Papers | 2014
    Cetin E; Diessel O; Gong L; Lai V, 2014, 'Reconfiguration network design for SEU recovery in FPGAs', in Proceedings IEEE International Symposium on Circuits and Systems, pp. 1524 - 1527,
    Conference Papers | 2013
    Cetin E; Diessel O; Gong L; Lai V, 2013, 'Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration', in 2013 23rd International Conference on Field Programmable Logic and Applications (FPL 2013), Porto, Portugal, pp. 1 - 4, presented at 2013 23rd International Conference on Field Programmable Logic and Applications (FPL), Porto, Portugal, 02 September 2013 - 04 September 2013,
    Conference Papers | 2013
    Diessel O, 2013, 'Opportunities and challenges for dynamic FPGA reconfiguration in electronic measurement and instrumentation', in Electronic Measurement & Instruments (ICEMI), 2013 IEEE 11th International Conference on, IEEE, pp. 258 - 263, IEEE
    Conference Papers | 2012
    Lingkan G; Diessel OF, 2012, 'Functionally Verifying State Saving and Restoration in Dynamically Reconfigurable Systems', in ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA, Association for Computing Machinery, New York, NY, United States, pp. 241 - 244, presented at 2012 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA'12, Monterey, California, USA, 22 February 2012 - 24 February 2012,
    Conference Presentations | 2012
    Lingkan G; Diessel OF, 2012, 'Simulation-based Functional Verification of Dynamically Reconfigurable Systems', presented at 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, 30 January 2012 - 02 February 2012
    Conference Papers | 2011
    Becker J; Benoit P; Cumplido R; Prasanna VK; Vaidyanathan R; Hartenstein R; Areibi S; Bampi S; Becker J; Benoit P; Bergmanr N; Brebner G; Buechner T; Cadenas O; Campi F; Carro L; Chen N; Cheung PYK; Cumplido R; Dandekar O; Diessel O; Jean-Philippe ; Diniz P; Donlin A; Elgindy H; Fahmy S; Glesner M; Gogniat G; Gu Y; Guccione S; Hariyama M; Hartenstein R; Heinkel U; Herkersdorf A; Hochberger C; Hollstein T; Jones A; Katkoori S; Koch A; Kress R; Krupnova H; Lagadec L; Lauwereins R; Leong P; Lysaght P; Marnane L; Mesquita D; Moraes F; Moreno M; Morra C; Morris J; Mukherjee A; Nakano K; Nunez-Yanez J; Ors B; Ou J; Pardo F; Parthasarathi R; Patterson C; Paulsson K; Pionteck T; Platzner M; Pottier B; Reis R; Santambrogio M; Sass R; Sassatelli G; Schaumont P; Schmeck H; Sezer S; Smit G; So H; Suttei G; Tanougast C; Teich J; Tessier R; Thomas D; Torres L; Trahan J; Torreser J; Vaidyanathan R; Valderrama C; Vanderbauwhede W; Vasilko M; Veale B; Vorbach M; Waldschmidt K; Wehn N, 2011, 'Raw introduction', Institute of Electrical and Electronics Engineers (IEEE), pp. 125 - 127, presented at 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum,
    Conference Papers | 2011
    Hredzak B; Diessel OF, 2011, 'Optimization of Placement of Dynamic Network-on-chip Cores Using Simulated Annealing', in IEEE, Proceedings of the 37th Annual Conference of the IEEE Industrial Electronics Society, Australia, pp. 2400 - 2405, presented at 37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011, Melbourne, VIC., Australia, 07 November 2011 - 10 November 2011,
    Conference Papers | 2011
    Lingkan G; Diessel OF, 2011, 'Modeling Dynamically Reconfigurable Systems for Simulation-based Functional Verification', in IEEE Symposium on Field-Programmable Custom Computing Machines, IEEE Computer Society, New York, NY, United States, pp. 9 - 16, presented at IEEE International Symposium on Field-Programmable Custom Computing Machines, Salt Lake City, Utah, USA, 01 May 2011 - 03 May 2011,
    Conference Papers | 2011
    Lingkan G; Diessel OF, 2011, 'ReSim: A Reusable Library for RTL Simulation of Dynamic Partial Reconfiguration', in International Conference on Field Programmable Technology, IEEE Computer Society, New York, NY, United States, pp. 1 - 8, presented at International Conference on Field-Programmable Technology, New Delhi, India,
    Conference Papers | 2010
    Kwek B; Sunarso F; Teoh M; van Zaal A; Preston P; Diessel OF, 2010,